The design of cameras has historically kept imagery and computational circuitry isolated in an attempt to maximize image quality by improving pixel pitch and routing density. Although this technique has worked in creating high density arrays of Continue reading
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Tag: Performance
Implementation Considerations for Active Noise Control in Ventilation Systems
The most common method to attenuate noise in ventilation systems today is passive silencers. For these to efficiently attenuate frequencies below 400 Hz such silencers need to be large and a more neat solution to Continue reading
Evaluation and Implementation of Neural Brain Activity Detection Methods for FMRI
ABSTRACT
Functional Magnetic Resonance Imaging (fMRI) is a neuroimaging technique used to study brain functionality to enhance our understanding of the brain. This technique is based on MRI, a painless, noninvasive image acquisition method without Continue reading
Control of Non-minimum Phase Power Converters
The inner structural characteristics of non-minimum phase DC-DC converters pose a severe limitation in direct regulation of voltage when addressed from a control perspective. This constraint is reflected by Continue reading
Virtual Lead-through Robot Programming: Programming Virtual Robot by Demonstration
This report describes the development of an application which allows a user to program a robot in a virtual environment by the use of Continue reading
Transformations Between Camera Images and Map Coordinates With Applications
The quality of cameras is currently increasing very fast meanwhile the price of them is decreasing. The possibilities of using a camera as a measurement and navigation instrument are thus getting Continue reading
Performance Analysis of IPv4 / IPv6 Protocols Over the Third Generation Mobile Network
Currently, the IPv4 protocol is heavily used by institutions, companies and individuals, but every day there is a higher number of devices connected to the network such as Continue reading
Efficient Decoding Algorithms for Low-Density Parity-Check Codes
Low-density parity-check codes have recently received much attention because of their excellent performance and the availability of a simple iterative decoder. The decoder, however, requires large amounts of Continue reading
A High Speed and Low Power VLSI Multiplier using a Redundant Binary Booth Encoding
This paper presents a new high speed and low power multiplier that uses a new encoding scheme, taking advantage of Continue reading