We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Continue reading
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Tag: CMOS
Low Voltage CMOS SAR ADC Design
This project centers on the design of a single ended 10-bit successive approximation register analog to digital converter (SAR ADC for short) that easily interfaces to a micro-controller, such as an Arduino. With micro-controller interfacing in Continue reading
A Novel Approach for High Speed and Low Power 4-Bit Multiplier
A circuit design for a new high speed and Low Power 4-bit Braun Multiplier is presented. The multiplier is implemented by using different power reduction techniques. To design a Continue reading
Physical Design of a Smart Camera with Integrated Digital Pixel Sensors Using a 0.13µm 8-Layer Metal CMOS Process
The design of cameras has historically kept imagery and computational circuitry isolated in an attempt to maximize image quality by improving pixel pitch and routing density. Although this technique has worked in creating high density arrays of Continue reading
A New Low Power 32×32-bit Multiplier
Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using Continue reading
An Asynchronous Pipelined 32×32-bit Iterative Multiplier Using Hybrid Handshaking Protocol
An asynchronous pipelined 32×32-bit iterative multiplier is presented in this paper. The multiplier supports 32×32-bit integer multiplication of both signed and Continue reading
High Speed 16×16-bit Low-Latency Pipelined Booth Multiplier
This paper presents a high-speed 16×16-bit CMOS pipelined booth multiplier. Actually in an n-bit modified Booth multiplier, because of Continue reading