In the industry of intellectual property products “IP-cores”, a communication link is almost always needed. A semiconductor intellectual property IP core is a reusable unit of logic in Continue reading
Get Latest ECE/EEE Mini Projects in your Email
Tag: FPGA
Implementation of a Program Address Generator in a DSP Processor
The purpose of this study is to construct a “Program Address Generator”(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the Continue reading
Analysis of the MIPS 32-bit, Pipelined Processor using Synthesized VHDL
For large and complicated ASIC designs, it is difficult to read and understand the circuits based on schematic drawings alone; as a result, a hardware description language is Continue reading
Hardware Accelerator for Duo-binary CTC Decoding: Algorithm Selection, HW/SW Partitioning and FPGA Implementation
Wireless communication is always struggling with errors in the transmission. The digital data received from the radio channel is often erroneous due to thermal noise and fading. The error rate can be Continue reading
Embedded Computer for Space Applications suitable for Linux
This report briefly describes the special requirements for a computer board for use in space. In particular, component selection and ways of mitigating the soft and hard errors Continue reading
Low Power 32×32 bit Multiplier Architecture based on Vedic Mathematics Using Virtex 7 Low Power Device
In this paper the most significant aspect of the proposed method is that, the developed multiplier architecture is based on vertical and crosswise structure of Continue reading
3D Image Segmentation Implementation on FPGA using EM/MPM Algorithm
In this Project, 3D image segmentation is targeted to a Xilinx Field Programmable Gate Array (FPGA), and verified with extensive simulation. Segmentation is performed using the Expectation-Maximization with Maximization of the Posterior Marginals (EM/MPM) Bayesian algorithm. This algorithm segments the Continue reading