As the positioning technology is becoming more advanced, people’s demands increase progressively on the indoor positioning system, since Global Positioning System (GPS) already cannot meet these demands. In order to solve the problem of Continue reading
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Tag: Design
RFID Emergency System for Tumble Detection of Solitary People
RFID (Radio Frequency Identification) system is a wireless system without any kinds of mechanical or optical connection between identifying and detected objects. It consists of two basic devices: a reader and tag. Recently with the development of the Continue reading
Energy Harvesting Of Human Kinetic Movement
Development of kinetic energy scavenging applications from the human body necessitates additional research to assist in designating a mounting position for a potential device. A data acquisition system adequately provides Continue reading
A Stroke Therapy Brace Design
Victims of stroke often have difficulty with rehabilitation. With limited movement on their affected arm, patients often do not want to move much for physical therapy. In this project, we design a robotic brace that helps stroke patients move their Continue reading
Wireless Low Power Data Acquisition Device: Embedded Design and Application
Embedded systems are utilized in various modern-day applications in order to ease routine tasks that are otherwise demanding in manpower; an example of which is data sensing and acquisition. Modern sensor applications usually involve one or more embedded microcomputer systems with Continue reading
The Design of a Low Power Asynchronous Multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of Continue reading
BZ-FAD: A Low-Power Low-Area Multiplier based on Shift-and-Add Architecture
In this paper, a low-power structure called BZ-FAD (Bypass Zero, Feed A Directly) for shift-and-add multipliers is proposed. The architecture considerably lowers the Continue reading
A New Low Power 32×32-bit Multiplier
Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using Continue reading
HDL Code Analysis For ASICs in Mobile Systems
The complex work of designing new ASICs today and the increasing costs of time to market (TTM) delays are putting high responsibility on the Continue reading
An Asynchronous Pipelined 32×32-bit Iterative Multiplier Using Hybrid Handshaking Protocol
An asynchronous pipelined 32×32-bit iterative multiplier is presented in this paper. The multiplier supports 32×32-bit integer multiplication of both signed and Continue reading
A High Speed and Low Power VLSI Multiplier using a Redundant Binary Booth Encoding
This paper presents a new high speed and low power multiplier that uses a new encoding scheme, taking advantage of Continue reading