Physical Design of a Smart Camera with Integrated Digital Pixel Sensors Using a 0.13µm 8-Layer Metal CMOS Process

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The design of cameras has historically kept imagery and computational circuitry isolated in an attempt to maximize image quality by improving pixel pitch and routing density. Although this technique has worked in creating high density arrays of pixels for large resolution imagers, it has never been able to achieve high framerate computational operations.

A radical approach is introduced to solve this dilemma by creating compact, low- power pixel elements with built-in analog-to-digital converters that directly interface with digital logic. These pixels are capable of integrating alongside logic cells and to create an array of pixels inside the processor that can capture a scene and perform operations across the entire image in parallel. Minimization of electronic circuitry is explored to design exotic miniature logic cells to further compact the design and optimize imaging quality.
Source: University of Nebraska-Lincoln
Authors: Mahir K. Gharzai

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